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Tiled Matrix Multiplication

A matrix multiply has enough reuse to be compute-bound, but only if the kernel captures that reuse in shared memory and registers instead of re-reading HBM. Tiling is how: a block owns an output tile, streams K-slices of A and B through shared memory, and each thread accumulates a small register tile. It is the live-coding exercise that separates people who know the roofline from people who have climbed it.

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RELATED CONCEPTS

Tensor Cores and Matrix Units Roofline Model Shared Memory and Bank Conflicts Occupancy and Register Pressure CUTLASS and Tensor Core Kernels Memory Coalescing

PRACTICE THIS IN REAL QUESTIONS

CUDA, Triton & Kernel EngineeringTake a GEMM from naive to 70% of peak: the steps, the speedup at each, and the arithmetic that says why.→GPU & Accelerator ArchitectureExplain how a systolic array computes a matrix multiply. Why is it efficient, and why does it want big square tiles?→CUDA, Triton & Kernel EngineeringExplain shared memory bank conflicts with the bank arithmetic, show a kernel that has them, and fix it with padding.→GPU & Accelerator ArchitectureWhy does the batch size change the TFLOPS a GEMM achieves? Draw the curve and explain each region.→GPU & Accelerator ArchitectureA kernel runs at 25% occupancy. Is that a problem? Walk me through what occupancy buys and when you would leave it low on purpose.→GPU & Accelerator ArchitectureWhat can you rely on from the L2 cache on a GPU? When does it save a kernel, and when does it mislead you?→